### Diode selection

Diode at each level of the voltage multiplier performs two major operations as firstly, it conducts to discharge every capacitor at each level and secondly it blocks the reverse voltage to prevent the unwanted conduction [20]. To choose our diode the following basic device parameter must be considered.

Multiplier circuit reverse voltage seen by each diode is 2Vm in Cockcroft-Walton voltage multiplier. So, the device must be selected with reverse voltage (VRRM) setting of at least 2Vm. Therefore, we have to select the diode voltage rating 2Vmax for the safety purpose [4].

While selecting the diodes for the rectifier, the frequency of input voltage to the multiplier circuit must be considered. For symmetrical input signals, the device chosen must be capable of switching at speed faster than the rise and fall times of the input [21]. If the reverse recovery time is too long, the efficiency and regulation of the device will be affected. In the worst-case insufficient recovery speed will result in accessing heating of device. In this case, the device will be permanently damaged. The reverse recovery time is conditioned by the circuit and the conditions used to make the measurement. Reverse recovery Time specification should be used for qualitative, not quantitative purposes since condition specified for the measurement rarely reflects those found in actual real life circuit operation [4]. Decreasing current flow in the multiplier circuit allows higher input frequency to be used. An increase in current flow has been the opposite effect. Ideally, the network load multiplier should draw no current.

Most rectifier diodes have a peak forward surge current rating. This value (rating) corresponds to the maximum peak value of single sinusoidal half-wave which, when superimposed on the nominal load current of the device, can be conducted without damaging of rectifier. This value becomes important when considering the large capacitance associated with multiplier network. Due to the capacitive loading effects on the rectifier, surge currents can be produced. With a high step-up turn ratio of the transformer, capacitor C_{1} on the secondary side is considered to be the largest one. Its value can be determined as follows:

$$C^{\prime}_{1} = NC_{1}$$

(1)

\({\text{Where}}; C_{1} = {\text{first multiplier circuit capacitance}}\),

$$C^{\prime}_{1} = {\text{Referred capacitance on primary side}}$$

\(N = {\text{ turns ratio of high voltage transformer}}\frac{{N_{2} }}{{N_{1} }}\).

When the circuit is turned on, large current develops in the primary side as this effective capacitance begins to charge. On the secondary side, large surge current can flow through the rectifiers during initial capacitor charging at turn on. The addition of a series resistance Rs can greatly reduce these current surges as well as those in the primary circuitry.

$$Rs = {\raise0.7ex\hbox{${ V_{{{\text{Peak}}}} }$} \!\mathord{\left/ {\vphantom {{ V_{{{\text{Peak}}}} } {Ifsm}}}\right.\kern-\nulldelimiterspace} \!\lower0.7ex\hbox{${Ifsm}$}}$$

(2)

In ideal multiplier circuits, the load will draw no current. Ideally, large current flow through the rectifier occurs during capacitor charging. Therefore, device with very low current rating (100 mA) and in case of cables. Micro amperes are also used. It must be noted that forward current and forward surge current rating are related [4]. Both are the function of silicon die area. It is truly speaking that device with a high surge current rating \(I_{fsm}\) will also have high forward current \(I_{O}\) rating and vice versa.

In practice the forward voltage drops \({\varvec{V}}_{{\varvec{f}}}\) of the rectifier does not have a significant effect on multiplier networks on the overall efficiency [4]. The calculation of the voltage drop is given by Eq. (3). For a half wave doubler (two stages) multiplier having an output voltage of 8000 V, and considering a forward voltage drop of the rectifier diodes as 2 V (for a forward current of 100 mA), its voltage drop is 0.05%.

$${\text{Voltage drop }} = {\text{No}}{\text{. of stages }}* \left( {{\raise0.7ex\hbox{${ {\text{Forward voltage}}}$} \!\mathord{\left/ {\vphantom {{ {\text{Forward voltage}}} {\text{Output voltage in V}}}}\right.\kern-\nulldelimiterspace} \!\lower0.7ex\hbox{${\text{Output voltage in V}}$}}} \right) *100$$

(3)

### Capacitor selection

The size of capacitors used in multiplier circuit is proportional to the frequency of input signal. Capacitor used in off line, 50 Hz application is typically in the range of 1.0 to 200 microfarad. The rated voltage of capacitor is determined by the type of multiplier circuit. The capacitor must be able to withstand a maximum voltage depending upon the numbers of staged used. A good thumb rule is to choose capacitor whose voltage rating is approximately twice that of actual peak applied voltage. Due to the AC impedance of the capacitors, there is a voltage drop \(V_{{{\text{drop}}}}\) and a peak-to-peak voltage ripple \(\delta V\) when the circuit is loaded [22,23,24]. Based on the theoretical analysis and the assumption presented in [22, 25, 26], the ratio \(X\) of the output voltage \({V}_{out}\) over \({V}_{max}\) the maximum value of the sinusoidal input supply voltage, is given by the equations;

$$\frac{{V_{{{\text{out}}}} }}{{V_{{{\text{max}}}} }} = X = X_{nl} - \frac{1}{{V_{{{\text{max}}}} }}\left( {V_{{{\text{drop}}}} + \frac{1}{2}\delta V} \right)$$

(4)

$$X_{nl} = \frac{{V_{{{\text{out}},nl}} }}{{V_{{{\text{max}}}} }} = 2n$$

(5)

$$\frac{{V_{{{\text{out}}}} }}{{V_{{{\text{max}}}} }} = \frac{g}{f}\left( {\mathop \sum \limits_{i = 1}^{n} \frac{{\left( {n + 1 - i} \right)^{2} }}{{C_{2i - 1} }} + \mathop \sum \limits_{i = 1}^{n - 1} \frac{{\left( {n + 1 - 1} \right)\left( {n - 1} \right)}}{{C_{2i} }}} \right)$$

(6)

$$\frac{\delta V}{{V_{max} }} = \frac{g}{f}\mathop \sum \limits_{i = 1}^{n} \frac{{\left( {n + 1 - i} \right)}}{{C_{2i} }}$$

(7)

where \(X_{nl}\) is the no-load voltage ratio,\(n\) the number of stages, f the frequency of the voltage supply, \(I_{l}\) the average value of the load current and

$$g = \frac{{I_{l} }}{{V_{{{\text{max}}}} }}$$

(8)

For the Fixed selection of capacitors;

$$C_{2i} = C_{2i - 1} = C$$

(9)

and for the Variable selection of capacitors

$$C_{2i} = C_{2i - 1} = \left( {n + 1 - i} \right)C$$

(10)

where \(i\) is the number of every stage and C the capacitance of the last stage (base capacitance). Considering that the total capacitance \(C_{{{\text{tot}}}}\) is the sum of all the capacitances of each topology

$$C_{{{\text{tot}}}} = \mathop \sum \limits_{i = 1}^{n} C_{i}$$

(11)

Voltage gain for the two models can be calculated as a function of \(C_{{{\text{tot}}}}\).

$${\text{Fixed model}}:X = 2n - \left( {\frac{g}{{f \times C_{{{\text{tot}}}} }} \times \frac{{n\left( {8n^{3} + 9n^{2} + n} \right)}}{6}} \right)$$

(12)

$${\text{And}}\;C_{{{\text{tot}}}} = 2nC$$

(13)

$${\text{Variable model}}:X = 2n - \left( {\frac{g}{{f \times C_{{{\text{tot}}}} }} \times \frac{{n^{2} \left( {n + 1} \right)\left( {2n + 1} \right)}}{2}} \right)$$

(14)

$${\text{And}}\;C_{{{\text{tot}}}} = n\left( {n + 1} \right)C$$

(15)

Figure 2 provides information of the gain \(X = \frac{{V_{{{\text{out}}}} }}{{V_{{{\text{max}}}} }}\) of the Fixed and Variable model against the number of stages for a fixed value of \(\frac{g}{{f \times C_{{{\text{tot}}}} }}\).

### Selection of number of stages

The selection of the number of stages in a Cockcroft Walton voltage multiplier circuit depends the desired output level. For fixed values of capacitances in the various stages, the number of stages should be in accordance with the required output voltage and the voltage drop till last stage [27]. The equation to calculate the number of stages is as follows:

$$n = \frac{{V_{{{\text{out}}}} + V_{{{\text{drop}}}} }}{{2 \times V_{{{\text{peak}}}} }}$$

(16)

where;

$$n = {\text{Number of stages}}$$

$$V_{{{\text{out}}}} = {\text{Output Voltage}}$$

$$V_{{{\text{drop}}}} = {\text{Voltage drop till last stage}}$$

$$V_{{{\text{peak}}}} = {\text{Input peak voltage}}$$

If we gets the value in fraction in the above equation then consider the nearest greater integer for the selection of the number of stages.

Cockcroft-Walton output voltage as a function of number of stages n, peak input voltage \(V_{max}\), output current \(I_{l}\), and product \(fc\) of frequency \(f\) and capacitance c [23].

$$V_{{{\text{out}}}} = 2nV_{{{\text{max}}}} - V_{{{\text{drop}}}}$$

(17)

$$V_{{{\text{drop}}}} = \frac{{I_{l} }}{6fc}\left( {4n^{3} + 3n^{2} - n} \right)$$

(18)

$$V_{{{\text{out}}}} = 2nV_{{{\text{max}}}} - \frac{{I_{l} }}{6fc}\left( {4n^{3} + 3n^{2} - n} \right)$$

(19)

From the \(V_{{{\text{out}}}}\) expression, due to the fast growth of the n^{3} term in the negative term (voltage drop relative to the no-load value), if n starts from zero and increases without changing other parameters, \(V_{{{\text{out}}}}\) first increases, then reaches a peak, and then decreases [28]. The derivative of \(V_{{{\text{out}}}}\) with respect to n is zero at peak \(V_{out}\) deriving the optimum number of stages (Fig. 3).

$$n_{{{\text{opt}}}} = \frac{1}{{8V_{{\max }} }}\left( { - V_{{\max }} + 2V_{{{\text{out}}}} + 2\left( {V_{{\max }} + 2V_{{{\text{out}}}} } \right)\cos \left[ {\frac{1}{3}Arc\text{Tan} \left[ {\frac{{4V_{{\max }} \sqrt {V_{{{\text{out}}}} \left( {2V_{{\max }} + V_{{{\text{out}}}} } \right)} \left( { - V_{{\max }} + 2V_{{{\text{out}}}} } \right)\left( {V_{{\max }} + 14V_{{{\text{out}}}} } \right)}}{{ - V_{{\max }}^{3} - 22V_{{\max }}^{2} V_{{{\text{out}}}} + 12V_{{\max }} V_{{{\text{out}}}}^{2} + 8V_{{{\text{out}}}}^{3} }}} \right]} \right]} \right)$$

(20)

Optimum n depends on input and output voltages \(V_{{{\text{max}}}}\), and \(V_{{{\text{out}}}}\) only, not on output current nor frequency or capacitance. Knowing the ratio of \(V_{{{\text{out}}}}\) to \(V_{{{\text{max}}}}\) which is \(X, n_{{{\text{opt}}}}\) can further be simplified as:

$$n_{{{\text{opt}}}} = \frac{1}{8}\left( { - 1 + 2X + \left( {2 + 4X} \right)cos\left[ {\frac{1}{3}ArcTan\left[ {\frac{{4\sqrt {X\left( {2 + X} \right)\left( { - 1 + 2X} \right)\left( {1 + 14X} \right)} }}{{ - 1 + 2X( - 11 + 6X + 6X^{2} }}} \right]} \right]} \right)$$

(21)

### Ripple factor and ripple voltage

Ripple of the n-stage multiplier for the Fixed model will be [4];

$$2\delta V = q\mathop \sum \limits_{n = 2}^{2n} \frac{1}{{C_{n} }}$$

(22)

For n stage total ripple is given by;

$$2\delta V = q\left( {\frac{1}{{C_{2n} }} + \frac{2}{{C_{2n - 2} }} + \frac{3}{{C_{2n - 4} }} + \frac{4}{{C_{2n - 6} }} + \ldots + \frac{n}{{C_{2} }}} \right)$$

(25)

For \(C_{2n} = C_{2n - 2} = C_{2n - 4} = C_{2n - 6} = \ldots = C_{2} = C\)

$$\Rightarrow \delta V = \frac{I}{2fC}\left( {\frac{{n\left( {n + 1} \right)}}{2}} \right) = \frac{I}{fC}\left( {\frac{{n\left( {n + 1} \right)}}{4}} \right)$$

(26)

Ripple of the n-stage multiplier for the Variable model is given as

$$\delta V = \frac{{n \times I_{l} }}{fC}$$

(27)

Ripple voltage is the magnitude of fluctuation in DC output voltage at a specific output current (assuming AC input voltage and AC input frequency are constant) [29]. In addition, ripple is function of number of stages and the switching frequency for a fixed capacitor design. Hence, varying frequency ripple can be reduced and can be treated as high frequency switching of CWVM network [30]. For pertaining the same threshold Fig. 4 provides information regarding variation of ripple with respect to the various frequency level.

### Voltage drop for fixed and variable model

Generally, in order to reduce the complexity of the circuit equations, the calculation of the diode voltage drop is neglected. Also, parasitic effect of diode and capacitor is neglected as its contribution is very small in the system. There are two modes of operation of CWVM the no load operation and operation under loaded condition [30]. There is drop due to internal behavior and load applied when the load is connected. This drop (considerably high) reduces the output voltage significantly.

Total drop is:

$$\Delta V = \Delta V_{n} + \Delta V_{n - 1} + \Delta V_{n - 2} + \cdots + \Delta V_{1}$$

(28)

On solving for each stage drop, the Fixed model drop gives us [31];

$$\Delta V_{2} = \frac{q}{C}n$$

(28a)

$$\Delta V_{4} = \frac{q}{C}\left[ {2n + \left( {n - 1} \right)} \right]$$

(28b)

$$\Delta V_{2n} = \frac{q}{C}\left[ {2n + 2\left( {n - 1} \right)} \right] + \cdots + 2 \times 2 + 1]$$

(28c)

Adding all *n* voltage drops gives the total voltage drop on load:

$$\Delta V_{{{\text{total}}}} = \frac{q}{C}\left[ {\frac{2}{3}n^{3} + \frac{1}{2}n^{2} - \frac{n}{6}} \right]$$

(29)

$$\Delta V_{{{\text{total}}}} = \frac{I}{fC}\left[ {\frac{2}{3}n^{3} + \frac{1}{2}n^{2} - \frac{n}{6}} \right]$$

(30)

The total voltage drop [23] for the variable model gives us;

$$\Delta V_{{{\text{total}}}} = \frac{{n^{2} I}}{f \times C}$$

(31)

Figure 5 shows us the Variation of Voltage drop against a fixed frequency.